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 NUP1301ML3T1 Low Capacitance Diode Array for ESD Protection in a Single Data Line
NUP1301ML3T1 is a MicroIntegrationTM device designed to provide protection for sensitive components from possible harmful electrical transients; for example, ESD (electrostatic discharge).
Features http://onsemi.com
* Low Capacitance (0.9 pF Maximum) * Single Package Integration Design * Provides ESD Protection for JEDEC Standards JESD22 * * * * * * * * * * * *
Machine Model = Class C Human Body Model = Class 3B Protection for IEC61000-4-2 (Level 4) 8.0 kV (Contact) 15 kV (Air) Ensures Data Line Speed and Integrity Fewer Components and Less Board Space Direct the Transient to Either Positive Side or to the Ground Pb-Free Package is Available T1/E1 Secondary IC Protection T3/E3 Secondary IC Protection HDSL, IDSL Secondary IC Protection Video Line Protection Microcontroller Input Protection Base Stations I2C Bus Protection
ANODE 1
CATHODE 2
3 CATHODE/ANODE
3 1 2
SOT-23 CASE 318 STYLE 11
Applications
MARKING DIAGRAM
53 M 1 53 = Device Code M = Date Code
MAXIMUM RATINGS (Each Diode) (TJ = 25C unless otherwise noted)
Rating Reverse Voltage Forward Current Peak Forward Surge Current Repetitive Peak Reverse Voltage Average Rectified Forward Current (Note 1) (averaged over any 20 ms period) Repetitive Peak Forward Current Non-Repetitive Peak Forward Current t = 1.0 ms t = 1.0 ms t = 1.0 S Symbol VR IF IFM(surge) VRRM IF(AV) Value 70 215 500 70 715 Unit Vdc mAdc mAdc V mA
ORDERING INFORMATION
Device NUP1301ML3T1 NUP1301ML3T1G Package SOT-23 Shipping 3000 / Tape & Reel
SOT-23 3000 / Tape & Reel (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
IFRM IFSM
450 2.0 1.0 0.5
mA A
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR-5 = 1.0 0.75 0.062 in.
(c) Semiconductor Components Industries, LLC, 2005
1
January, 2005 - Rev. 4
Publication Order Number: NUP1301ML3T1/D
NUP1301ML3T1
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance Junction-to-Ambient Lead Solder Temperature Maximum 10 Seconds Duration Junction Temperature Storage Temperature Symbol RqJA TL TJ Tstg Max 625 260 -65 to 150 -65 to +150 Unit C/W C C C
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) (Each Diode)
Characteristic OFF CHARACTERISTICS Reverse Breakdown Voltage (I(BR) = 100 mA) Reverse Voltage Leakage Current (VR = 70 Vdc) (VR = 25 Vdc, TJ = 150C) (VR = 70 Vdc, TJ = 150C) V(BR) IR 70 - - - - - - - - - - - - - - - - - - 2.5 30 50 0.9 715 855 1000 1250 Vdc mAdc Symbol Min Typ Max Unit
Diode Capacitance (between I/O and ground) (VR = 0, f = 1.0 MHz) Forward Voltage (IF = 1.0 mAdc) (IF = 10 mAdc) (IF = 50 mAdc) (IF = 150 mAdc)
CD VF
pF mVdc
2. FR-5 = 1.0 0.75 0.062 in. 3. Alumina = 0.4 0.3 0.024 in, 99.5% alumina.
http://onsemi.com
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NUP1301ML3T1
ESD Input Signal
Figure 1. ESD Test Circuit
APPLICATION NOTE
Electrostatic Discharge
A common means of protecting high-speed data lines is to employ low-capacitance diode arrays in a rail-to-rail configuration. Two devices per line are connected between two fixed voltage references such as VCC and ground. When the transient voltage exceeds the forward voltage (VF) drop of the diode plus the reference voltage, the diodes direct the
surge to the supply rail or ground. This method has several advantages including low loading capacitance, fast response time, and inherent bidirectionality (within the reference voltages). See Figure 1 for the test circuit used to verify the ESD rating for this device.
http://onsemi.com
3
NUP1301ML3T1
PACKAGE DIMENSIONS
SOT-23 (TO-236) CASE 318-08 ISSUE AK
A L
3 1 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318-01 THRU -07 AND -09 OBSOLETE, NEW STANDARD 318-08. INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60
BS
V
G C D H K J
DIM A B C D G H J K L S V
STYLE 11: PIN 1. ANODE 2. CATHODE 3. CATHODE-ANODE
SOLDERING FOOTPRINT*
0.95 0.037
0.95 0.037
2.0 0.079 0.9 0.035 0.8 0.031
SCALE 10:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
MicroIntegration is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
4
NUF1301ML3T1/D


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